VIP: Address translation for fast Memory block moves

نویسندگان

  • Srikanth T. Srinivasan
  • Alvin R. Lebeck
چکیده

In today's computer world, memory operations that require processor intervention are branded \costly". This paper addresses one such problem { moving block data in physical memory. Current techniques for doing memory block moves involve the processor and are extremely slow. The VIP mechanism presented in this paper separates the logical placement of data in memory from the actual or physical placement. This is done by introducing another level of indirection (an intermediate address) in the virutal to physical address translation process. Using the VIP mechanism, memory block moves can be achieved by simply manipulating the intermediate to physical mapping and leaving the data as it is in physical memory. Moves will now be able to proceed an order of magnitude faster than before. We evaluated the VIP mechanism by using it in the context of superpages. The ability to move pages fast, allowed the creation of more superpages, resulting in reducing the TLB miss rate from 1.5 { 1.9% to less than 0.01%.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

FAST: An Efficient Flash Translation Layer for Flash Memory

Flash memory is used at high speed as storage of personal information utilities, ubiquitous computing environments, mobile phones, electronic goods, etc. This is because flash memory has the characteristics of low electronic power, non-volatile storage, high performance, physical stability, portability, and so on. However, differently from hard disks, it has a weak point that overwrites on alre...

متن کامل

Reducing Computation Overhead of Flash Translation Layer with Hash

NAND flash memory does not support the overwrite operation and thus it deploys the flash translation layer which performs the out-place update. When designing a flash translation layer, memory consumption, computation complexity, and garbage collection overhead should be low. However, the representative sector mapping scheme of flash translation layer, FAST causes a huge computation complexity ...

متن کامل

Hardware and Software Mechanisms for Reducing Load Latency

As processor demands quickly outpace memory, the performance of load instructions becomes an increasingly critical component to good system performance. This thesis contributes four novel load latency reduction techniques, each targeting a di erent component of load latency: address calculation, data cache access, address translation, and data cache misses. The contributed techniques are as fol...

متن کامل

Crash Recovery in FAST FTL

NAND flash memory is one of the non-volatile memories and has been replacing hard disk in various storage markets from mobile devices, PC/Laptop computers, even to enterprise servers. However, flash memory does not allow in-place-update, and thus a block should be erased before overwriting the existing data in it. In order to overcome the performance problem from this intrinsic deficiency, flas...

متن کامل

Exploring Rhetorical-Discursive Moves in Hassan Rouhani’s Inaugural Speech: A Eulogy for Moderation

Before a president practically begins his four-year term of office in Iran, a formal inaugural ceremony is held in the parliament. Being attended by national dignitaries and representatives from other countries, the inauguration of Iran's seventh president, Hasan Rouhani, was spectacular in several respects. The current study aimed at investigating the generic structure and rhetorical moves tha...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 1997